It’s that time of the year again, and after last month’s unveiling of Arm’s newest infrastructure Neoverse V1 and Neoverse N2 CPU IPs, it’s now time to cover the client and mobile side of things. This year, things Arm is shaking things up quite a bit more than usual as we’re seeing three new generation microarchitectures for mobile and client: The flagship Cortex-X2 core, a new A78 successor in the form of the Cortex-A710, and for the first time in years, a brand-new little core with the new Cortex-A510. The three new CPUs form a new trio of Armv9 compatible designs that aim to mark a larger architectural/ISA shift that comes very seldomly in the industry.

Alongside the new CPU cores, we’re also seeing a new L3 and cluster design with the DSU-110, and Arm is also making a big upgrade in its interconnect IP with the new cache coherent CI-700 mesh network and NI-700 network-on-chip IPs.

The Cortex-X2, A710 and A510 follow up on last year's X1, A78 and A55. For the new Cortex-X2 and A710 in particular, these are direct microarchitectural successors to their predecessors. These parts, while iterating on generational improvements in IPC and efficiency, also incorporate brand-new architectural features in the form of Armv9 and new extensions such as SVE2.

The Cortex-A510, Arm's new little core, is a larger microarchitectural jump, as it represents a new clean-sheet CPU design from Arm’s Cambridge CPU design team. A510 brings large IPC improvements while still having a continued focus on power efficiency, and, perhaps most interestingly, retains its characteristic in-order microarchitectural.

An Armv9 CPU Family – AArch64 only for all practical purposes*

The new CPU family marks one of the largest architectural jumps we’ve had in years, as the company is now baselining all three new CPU IPs on Armv9.0. We've extensively covered the details of the new Arm architecture back in late March. Cornerstone features of the new ISA include the new enrollment of prior optional/missing Armv8.2+ features that weren’t guaranteed in mobile and client designs (mostly due to the older A55 cores), and the introduction of new SVE2 SIMD and vector extensions.

One big change we’ve been expecting for quite some time now is that we’ll be seeing a deprecation of the 32-bit AArch32 execution mode in upcoming Arm Cortex-A mobile cores. The clock has been ticking for 32-bit apps ever since Google’s announced in 2019 that the Google Play store will require for 64-bit app uploads, and the company will stop serving 32-bit applications to 64-bit compatible devices later this summer

While Arm is declaring that shift to happen in 2023, for all intents and purposes it’s already happening next year for most global users. Both the Cortex-X2 flagship core and the Cortex-A510 little cores are AArch64-only microarchitectures that are no longer able to execute AArch32 code.

With that said, sharp readers will note that two out of three CPUs isn't a complete shift, and the reason for that is because the Cortex-A710 actually still supports AArch32. Arm states that the reason for this is primarily to meet the needs of the Chinese mobile market, which lacks the homogeneous ecosystem capabilities of the global Play Store markets, and Chinese vendors and their domestic app market require a little more time to facilitate the shift towards 64-bit only. This means we’ll have an odd scenario next year of having SoCs on which only the middle cores are able to execute 32-bit applications, with those apps being relegated to the middle A710 cores and missing out on the little A510 cores’ power efficiency or the X2 cores’ performance.

On the big core side, the new Cortex-X2 and Cortex-A710 are successors to the Cortex-X1 and Cortex-A78. Both designs are mostly designed by Arm’s Austin design team, and represent the 4th generation of this microarchitecture family, which had started off with the Cortex-A76 several years ago. These cores should be the last of this microarchitecture family before Arm hands things off to a completely new design with next year’s new Sophia cores.

In terms of design philosophy, the X2 and A710 generally keep the same overarching goals the X1 and A78 had defined: The X-series continues to focus on advancing performance by increasing microarchitectural structures and by Arm being willing to make compromises on power within reasonable limits. Meanwhile the A710 continues to focus on advancing performance and efficiency through smarter design and with a large focus on maximizing the power, performance, and area (PPA) balance of the IP.

One point Arm makes in the above slide is having optimized critical paths and physical design for sustained voltage operations – this is more of a goal the company is striving for in the next generations of “middle” cores rather than something that’s specifically reflected in the Cortex-A710.

This year, we are also finally seeing a new little core. We had covered the Cortex-A55 back in 2017, and since then we haven’t had seen any updates to Arm’s little cores, to the point of it being seen as large weakness of last few generations of mobile SoCs.

The new Cortex-A510 is a clean-sheet design from Arm’s Cambridge design team, leveraging a lot of the technologies that had been employed in the company’s larger cores, but implemented into a new in-order little microarchitecture. Yes – we’re still talking about an in-order core, and Arm still sees this to be the best choice in terms of extracting the best efficiency and “Days of use” of mobile devices.

Even though it’s a in-order core, Arm made a comparison that the new design is extremely similar to a flagship core of 2017 – namely the Cortex-A73, achieving very similar IPC and frequency capabilities whilst consuming a lot less power.

The new design also comes with a very interesting shared complex approach and shares the L2 and FP/SIMD pipelines with a second core, a design approach Arm calls “merged core” and undoubtedly will remind readers of AMD’s CMT approach in Bulldozer cores 10 years ago, even though there are quite important differences in the approaches.

The Cortex-X2: More Performance, Deeper OoO
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  • Spunjji - Thursday, May 27, 2021 - link

    Comments saying "x86 is dead" are just as daft as the comments declaring that ARM will never be a threat to x86. Reply
  • mode_13h - Tuesday, May 25, 2021 - link

    What a terrible naming scheme!

    If they didn't want to just start from a blank slate, they should've gone on to letters. So, A7A and A5A.

    Also, given that the X-cores are typically going to be paired with their cousin A-series core, the naming scheme should reflect that relationship. So, maybe the X1 should've been the X78 and the X2 could be the X710 or X7A.
    Reply
  • mode_13h - Tuesday, May 25, 2021 - link

    Also, why skip 9? A59 and A79 would be a great mnemonic for the first mobile cores to be ARMv9! Reply
  • nandnandnand - Tuesday, May 25, 2021 - link

    I'm fine with the naming scheme.

    For the Cortex-X line, they can just do X1, X2, X3, X4... X-cetera.

    For these new ones, A710 and A510 are the baseline, and they can put out A720, A525, or whatever until they run it up to A799. That could take over a decade if they don't increment the numbers so much. The '7' and '5' let you know these are related to the A78/A55, and the 3 digits lets you know it's part of the brave new world of ARMv9.
    Reply
  • mode_13h - Tuesday, May 25, 2021 - link

    > they can put out A720

    That could potentially create some confusion about the relationship between A72 and A720.

    > 3 digits lets you know it's part of the brave new world of ARMv9.

    Okay, so create a new numbering scheme! No need to piggy back off the old one, if it's "a brave new world", right?
    Reply
  • phoenix_rizzen - Tuesday, May 25, 2021 - link

    Would have been a good time to pick new letters. Leave Cortex-A, Cortex-X, Cortex-M etc for Armv8.x.

    Even better, drop the Cortex name, and pick something new for Armv9-based cores.

    X, Y, Z would have been nice for big, middle, little cores.

    Ah well, marketing-droids will do what marketing-droids do. :D
    Reply
  • mode_13h - Tuesday, May 25, 2021 - link

    Also, A79 would line up nicely with being the last generation of this microarchitecture family.

    Then, maybe the "Sophia" cores could start a new numbering series.
    Reply
  • GeoffreyA - Thursday, May 27, 2021 - link

    "What a terrible naming scheme!"

    They should battle it out with Intel's Marketing arm to see who's the best in the field of naming.
    Reply
  • eastcoast_pete - Tuesday, May 25, 2021 - link

    Disappointed in the design choice of the new LITTLE cores. I have the strong suspicion that the IPC comparison of the 510 LITTLE core to the A73 (the 510 getting close to the A73) is with one 510 core per complex, maximal cache and cache bandwidth etc, which, of course, is highly theoretical. After all, the 510s are designed to come in pairs sharing resources for a reason. I am underwhelmed by this design, ARM's own power/perf curves show very little if any difference to A55 until one gets to the high end of the power curve, at which point the 710 big cores would have taken over. Unfortunately, Apple's power/perf crown for efficiency cores remains quite and comfortably safe. As an Android user, however, I remain stuck with ARM's designs, as none of the design houses (QC, Samsung) is even attempting custom core designs for smartphone SoCs. We are seeing the downside of a monopoly here Reply
  • mode_13h - Tuesday, May 25, 2021 - link

    > I remain stuck with ARM's designs, as none of the design houses (QC, Samsung)
    > is even attempting custom core designs for smartphone SoCs.

    Qualcomm is saying they're using their Nuvia acquisition to make new mobile cores.
    Reply

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