Section by Gavin Bonshor

X570 Motherboards: PCIe 4.0 For Everybody

One of the biggest additions to AMD's AM4 socket is the introduction of the PCIe 4.0 interface. The new generation of X570 motherboards marks the first consumer motherboard chipset to feature PCIe 4.0 natively, which looks to offer users looking for even faster storage, and potentially better bandwidth for next-generation graphics cards over previous iterations of the current GPU architecture. We know that the Zen 2 processors have implemented the new TSMC 7nm manufacturing process with double the L3 cache compared with Zen 1. This new centrally focused IO chiplet is there regardless of the core count and uses the Infinity Fabric interconnect; the AMD X570 chipset uses four PCIe 4.0 lanes to uplink and downlink to the CPU IO die.

Looking at a direct comparison between AMD's AM4 X series chipsets, the X570 chipset adds PCIe 4.0 lanes over the previous X470 and X370's reliance on PCIe 3.0. A big plus point to the new X570 chipset is more support for USB 3.1 Gen2 with AMD allowing motherboard manufacturers to play with 12 flexible PCIe 4.0 lanes and implement features how they wish. This includes 8 x PCIe 4.0 lanes, with two blocks of PCIe 4.0 x4 to play with which vendors can add SATA, PCIe 4.0 x1 slots, and even support for 3 x PCIe 4.0 NVMe M.2 slots.

AMD X570, X470 and X370 Chipset Comparison
Feature X570 X470 X370
PCIe Interface (to peripherals) 4.0 2.0 2.0
Max PCH PCIe Lanes 24 24 24
USB 3.1 Gen2 8 2 2
Max USB 3.1 (Gen2/Gen1) 8/4 2/6 2/6
DDR4 Support 3200 2933 2667
Max SATA Ports 8 8 8
PCIe GPU Config x16
x8/x8
x8/x8/x8*
x16
x8/x8
x8/x8/x4
x16
x8/x8
x8/x8/x4
Memory Channels (Dual) 2/2 2/2 2/2
Integrated 802.11ac WiFi MAC N N N
Chipset TDP 11W 4.8W 6.8W
Overclocking Support Y Y Y
XFR2/PB2 Support Y Y N

One of the biggest changes in the chipset is within its architecture. The X570 chipset is the first Ryzen chipset to be manufactured and designed in-house by AMD, with some helping ASMedia IP blocks, whereas previously with the X470 and X370 chipsets, ASMedia directly developed and produced it using a 55nm process. While going from X370 at 6.8 W TDP at maximum load, X470 was improved upon in terms of power consumption to a lower TDP of 4.8 W. For X570, this has increased massively to an 11 W TDP which causes most vendors to now require small active cooling of the new chip.

Another major change due to the increased power consumption of the X570 chipset when compared to X470 and X370 is the cooling required. All but one of the launched product stack features an actively cooled chipset heatsink which is needed due to the increased power draw when using PCIe 4.0 due to the more complex implementation requirements over PCIe 3.0. While it is expected AMD will work on improving the TDP on future generations when using PCIe 4.0, it's forced manufacturers to implement more premium and more effective ways of keeping componentry on X570 cooler.

This also stretches to the power delivery, as AMD announced that a 16-core desktop Ryzen 3950X processor is set to launch later on in the year, meaning motherboard manufacturers needed to implement the new power deliveries on the new X570 boards with requirements of the high-end chip in mind, with better heatsinks capable of keeping the 105 W TDP processors efficient.

Memory support has also been improved with a seemingly better IMC on the Ryzen 3000 line-up when compared against the Ryzen 2000 and 1000 series of processors. Some motherboard vendors are advertising speeds of up to DDR4-4400 which until X570, was unheard of. X570 also marks a jump up to DDR4-3200 up from DDR4-2933 on X470, and DDR4-2667 on X370. As we investigated in our Ryzen 7 Memory Scaling piece back in 2017, we found out that the Infinity Fabric Interconnect scales well with frequency, and it is something that we will be analyzing once we get the launch of X570 out of the way, and potentially allow motherboard vendors to work on their infant firmware for AMD's new 7nm silicon.

Memory Hierarchy Changes: Double L3, Faster Memory Benchmarking Setup: Windows 1903
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  • Ryan Smith - Monday, July 8, 2019 - link

    Thanks, Lord Ball!
  • ballsystemlord - Wednesday, July 10, 2019 - link

    You're welcome. Its nice to be recognized.
  • ballsystemlord - Sunday, July 7, 2019 - link

    @andrei I've been closely watching Geekbench since it's introduction to the suite and the ST mode seems to love clock speed. Maybe next time you can give normalized results.

    "We're investigating the PCMark results, which seem abnormally high."
    Aww, c'mon, we all love an AMD shill. :-)

    Corona is especially interesting for it's magic Intel number.
    The 9900K 5B-RPS which is the same as it's boost clock frequency of 5GHz!
    The 3700X is doing 4.6B-RPS and has a boost clock speed of 4.4GHz.
  • Desierz - Sunday, July 7, 2019 - link

    How will using the 3xxx CPUs performance be affected by running on a PCIe 3.0 motherboard?
  • zzing123 - Sunday, July 7, 2019 - link

    With the X570, given the vast increase in TDP to 11/15W (which ASRock for one has opted to use X470 in their server board: https://www.servethehome.com/asrock-rack-x470d4u-a... I wonder why AMD didn't choose to bump the chipset to a better process node, since 55nm is positively ancient. Could you ask about this, as it seems to be a card that fell off the table when looking a platform efficiency, and dents AMD's armour when it comes to beating Intel on thermal efficiency...
  • Mugur - Monday, July 8, 2019 - link

    AFAIK the x570 chipset is 14nm, exactly like the uncore of the 3000 cpus.
  • GreenReaper - Monday, July 8, 2019 - link

    Seems weird for PCIe 4.0 to take so much more than 3.0, though it is twice the speed. Maybe they implemented as an FPGA rather than an ASIC? Though that seems like a weird solution, and I'm not sure there are any FPGAs at 14nm. I guess we'll see if it reduces with the next series. (More conspiracy-theory wise, maybe they're hiding some high-power feature in there, extra cores...)
  • trenzterra - Sunday, July 7, 2019 - link

    How do the pcie 4.0 x4 lanes work between cpu and chipset? Would 2 pcie 3.0 x4 devices be able to run at full speed? Does the chipset aggregate the bandwidth available back to cpu?

    Also would it be possible to use all 16 lanes on the chipset at once, just that when it goes back to the cpu they would simply be restricted in speed?
  • zzing123 - Sunday, July 7, 2019 - link

    The CPU has 24 PCIe 4.0 lanes available. The chipset has an x4 link to the CPU. The chipset can be configured as one x8, or 2x x4 blocks, each of which can be 1x x4, 2x x2, or 4x SATA. These are all switched within the X570 southbridge (so therefore aggregated to the CPU). However, remember the chip is also giving 20 other native lanes, and each of these is double the bandwidth of PCIe 3.0. A PCIe 3.0 GPU with an x16 connector is actually only x8 PCIe 4.0 lanes in terms of bandwidth available.
  • trenzterra - Sunday, July 7, 2019 - link

    Hmm, so is it correct to say I can either have 4 or 8 PCIe 4.0 x4 lanes to the CPU? 4 is natively reserved by the CPU and the other 4 is general purpose which could be reserved for this purpose?

    So given 8 lanes of PCIe 4.0 to the CPU, if the chipset supports, say, the use of 16 lanes, does it mean I can use all 16 lanes at once, just that it will run at PCIe 3.0 speeds?

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