10nm Takes a Different Tack: Cannon Lake to Ice Lake

In Intel’s own words, it shipped its first 10nm products for revenue by the end of 2017. These first processors, known as Cannon Lake, were shipped to a number of OEMs and stealthily hidden from the public, being pushed into commercial and educational products in China and others.

The processor had only two cores active, and the integrated graphics was broken, giving an indication of how well the first generation of 10nm was progressing. Intel had already committed to shipping 10nm for revenue by the end of 2017 to its investors, and the small side announcement at CES 2018 (it wasn’t mentioned in the keynote) followed by the small trickle of almost non-existent Cannon Lake product over 2018 technically fulfilled Intel’s obligation.

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This version of 10nm didn’t get off the ground. Intel eventually put it into the Crimson Canyon NUC family in late 2018, but it was slower than the 14+++ processors it was meant to replace, and used more power.

At the time when Intel announced 10nm was shipping for revenue, it had already announced that the next generation product was going to be called Ice Lake, built on ‘10nm+’. By Intel’s Architecture Day in December 2018, the company tried to quietly rebadge Ice Lake as 10nm – when asked about the change and if this version of 10nm was any different to Cannon Lake, Intel’s Raja Koduri, partnered with Murthy Renduchintala, stated that ‘[10nm] is changing, but it hasn’t changed’. If ever there was a cryptic answer, this was it.

Ice Lake Rebadged to 10nm: Why?

So now we have Cannon Lake on ‘10nm’, and Ice Lake originally on 10+ but now rebadged to 10nm, but a different 10nm, with no real explanation as to why. In discussing with a number of peers and analysts in private conversations, the apparent conclusion they have come to is that Intel did not want to admit that its first generation of 10nm product had failed. Ever since then, Intel has attempted to quietly and discreetly shift Cannon Lake under the rug, as if it didn’t exist (it does exist, we did a big review on it, and Crimson Canyon is still for sale today at some of Intel’s biggest partners and major retailers).

Without Intel needing to admit that the first generation had failed, Ice Lake was the true ‘native’ 10nm product that was destined for life in the fast lane for consumers. If that was the case, then the low key presentation at CES 2018 stating it was shipping in 2017 was simply to meet investor targets. Intel never promoted Ice Lake as its first 10nm product, but the fact that the Cannon Lake product wasn't great meant that the company had to try and remove it from people's minds.

On Ice Lake, we studied the Ice Lake design, and we’ve seen lots of notebooks built on it. The fact that Intel called it ‘10th Gen’, and then also released the Comet Lake 14++++ product also called ‘10th Gen’, really ended up confusing the company even more, even in presentations to the press. It was the first time Intel had two products within the same generation of marketing name under different process nodes. It even confused OEM partner marketing teams as well as sales staff.

The problem with calling Ice Lake the new 10nm, is that internally the engineers still called it 10+. As Intel also announced other new products, such as Snow Ridge, or Lakefield, despite these meant to be called under the new 10nm, they would often be cited as ‘10+’ depending on which department of Intel you spoke to.

10nm Takes a Different Tack: Sapphire Rapids and Tiger Lake

In later 2019, during Intel’s HPC DevCon event focusing on supercomputers, the company discussed its post-Ice Lake server processor, Sapphire Rapids. It had already been announced that Sapphire Rapids was to power the Aurora supercomputer (which was originally supposed to have a 10nm Xeon Phi processor), however as part of the DevCon event we were discussion Sapphire Rapids in the context of a 10+++ process node. This event was mostly under the auspices of engineers, and those engineers were using 10+++ under the oldest naming scheme to identify Sapphire Rapids, or in other conversations, 10++. We were subsequently corrected by marketing in confirming that the official process node name was 10++; the engineers somewhat scoffed at this as a knock on effect to the Ice Lake name changing.

With the confusion on what to call these products between marketing and engineering, the discussions between the two (at least, from my perspective) didn’t really have any teeth at the time. Engineers didn’t either know about the new naming scheme, or didn’t understand why marketing had changed the names. Marketing wasn’t always there to correct engineering when speaking externally, and even if they were, sometimes the engineers wouldn’t understand the reasons why the names had changed. It starting to come to a head when Intel was discussing the product after Ice Lake, called Tiger Lake.

At CES 2020, the company announced Tiger Lake to the world in its Keynote address. As part of that keynote, as well as the press briefings, there was a lot of discussion as to whether this was a 10++ or 10+ product. People were getting confused between the old naming schemes and the new naming scheme, and whichever one was being used at the time.

I have continually had the conversation, especially at technical events, where I need to ask someone from Intel to clarify which scheme they were working under for any given product. For anyone outside of this bubble trying to keep track of it all, I can’t imagine what headaches you might have had – I was talking directly to Intel a lot of the time and it was giving me plenty of headaches! As Intel started announcing more 10nm-class products from different portfolio lines, each business unit had its own engineers in its own state of confusion. This came to a head when Intel changed the naming a second time.

No More Pluses, It’s All About SuperFin

As part of Intel’s Architecture Day 2020, the company did three things:

  1. Go into detail about Tiger Lake
  2. Go into detail about DG1 Xe Graphics, and new products in the portfolio
  3. Rename the different 10nm process node using SuperFin

As part of that event, Intel went into some detail about its new ‘SuperFin’ technology. Using an updated metal stack and new capacitor technology, Intel had designated its latest BKM update for Tiger Lake and DG1 graphics as ‘10nm SuperFin’.

This is very much a marketing name, but the idea from the point of view of Intel’s communications team was to rebadge every 10nm product from Intel with some new variation of SuperFin as needed. This pushed Intel away from the ++++ nomenclature (something I’d advocated for anyway), and gave an opportunity for the company to realign all of its manufacturing branding with this new scheme.

While an interesting direction, Intel’s communications team has had two problems with this.

  1. Most/Some engineers were still working on the original naming scheme
  2. Some engineers/marketing were working on the first updated naming scheme and didn’t get the memo

Since changing from + and ++ to SuperFin, I have had a number of confusing calls with Intel’s engineers.

At Hot Chips in August, I was told by the presenter of the Ice Lake Xeon processors that the technology was an ‘enhanced 10nm’, which could have been meant as 10+, under the original naming scheme.

Even this week, for the launch of Intel’s new embedded Atom CPUs, I was told these CPUs were ‘10++’, without any indication of which naming scheme they were using. I was then told it was SuperFin. After the press release was changed for SuperFin, and we published our article, it was noticed that Intel's own product database had it listed as regular 10nm, no SuperFin. It turns out that it was regular 10nm, no SuperFin, the same as Ice Lake.

Even when directly discussing with Intel’s communication teams, they would start referring to the original naming scheme, or the first updated scheme. I've had to request double confirmation on multiple occasions. While Intel has a main HQ communications team, each business unit inside Intel has its own PR people. Each business unit may also be working with a PR agency (sometimes different to each other), and then beyond that, there may be different PR connections for each region, and then each with its own localized PR company. Renaming a product or a process is thus a very hard thing to force down every channel, compared to a new product which should have the right name on the initial documents.

When speaking with Intel’s lead Tiger Lake engineers in a 1-on-1 interview, I asked them outright if the new SuperFin naming scheme was being used by the engineering teams. I was told that for the most part, it was. I followed up asking if mistakes and slip ups were made, and the answer came back in the affirmative. It’s somewhat clear that the Engineering teams don’t like being pushed around by the marketing/communications teams in this way, having to change internal documents and naming processes in order to internalize what stuff is being called when it can’t be called what it originally was almost a decade ago. We see the same thing when engineers are rolled out to present about new products – they will call the processors by the internal code names, not ‘Core 10th Gen’ or similar, and often have to stop themselves by continually saying the code name.

Why Do We Have Multiple Versions of a Process? The AnandTech Decoder Ring for Intel 10nm
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  • drexnx - Friday, September 25, 2020 - link

    except that's categorically untrue. Each revision of the 14nm process has improved upon the previous, notably so.

    look at how poorly the initial Broadwell clocked and scaled (they didn't even release mainstream performance 5xxx chips!) vs. Cannon Lake and tell me they're the same process.
  • drexnx - Friday, September 25, 2020 - link

    er, vs. Rocket lake not Cannon lake.

    (too many lakes...)
  • AMDSuperFan - Friday, September 25, 2020 - link

    Where can I compare the Rocket Lake? Maybe you have the insider know how?
  • Smell This - Friday, September 25, 2020 - link


    Kaby 14nm 'backed-up' from the original design, and Chipzillah dumped tock-tick for **PAO**

    When you say, "Each revision of the 14nm process has improved upon the previous" ... that would be incorrect.
  • dotjaz - Friday, September 25, 2020 - link

    Except you can wrong and it does mean something. They have different design rules FFS. You can't just call it 14nm when in reality you must redesign and tape out again.
  • dotjaz - Friday, September 25, 2020 - link

    *are
  • Spunjji - Friday, September 25, 2020 - link

    Agreed. 10a, 10b etc. would also work.
  • jamesindevon - Friday, September 25, 2020 - link

    Ian, you are being way too polite to Intel.

    I don't blame you: you want to keep your contacts fairly happy. But Intel have now reached a point where customers just can't tell what they're buying.

    It's not just the process names. It's not just the crazy numbering scheme, although if it wasn't for ark.intel.com, it would be.

    We've long had the situation where laptop OEMs can change the effective performance of a processor by changing the effective TDP, but with Tiger Lake Intel have been taking things way further. We're now at the position where it is effectively impossible to choose between laptops based on performance, because you just can't tell how the processor will perform. The OEMs won't tell you how they've configured their laptops beyond a processor model number.

    I, for one, am giving up on Intel marketing. If I want performance I can be fairly sure about, it looks like I have to buy AMD (and they're not as consistent as they should be, due to different laptop thermals. They don't have the option there: Intel do, but aren't taking it.)

    Jerry Pournelle once wrote that "years ago when AT&T tried to market PC's I said that if they bought Colonel Sanders they'd advertise hot dead chicken." Intel seem to have forgotten that dig.
  • ikjadoon - Friday, September 25, 2020 - link

    >We're now at the position where it is effectively impossible to choose between laptops based on performance, because you just can't tell how the processor will perform.

    Intel's misleading and backhanded TDP tactics aside: "the CPU model doesn't tell you the performance" has been true since Kaby Lake R, when Intel first moved to quad-cores.

    Look at the massive score variation between i5-8250U CPUs: https://www.notebookcheck.net/Intel-Core-i5-8250U-...

    There is genuinely no "one benchmark score". These might as well be different process nodes and in wildly different places in the product stack. It's impossible to know what power limits have been chosen.

    Ever since laptops became thermally constrained, every notebook's TDP (PL1) / PL2 / Tau and thus performance is completely configurable and not standardized.

    This blame also should go back to laptop manufacturers, as well, who damn well know the TDP (PL1) / PL2 / Tau that they explicitly programmed and designed around.

    HP picks a 35 W PL2. Dell picks a 50 W PL2. Acer's Efficiency mode, if chosen, sets a 25 W PL2.

    In the end, I hope AMD sticks it to Intel by demanding AMD OEM manufacturers to clearly label their long-term and short power limits. Nothing but competition will force Intel to change.
  • Spunjji - Friday, September 25, 2020 - link

    This. 👍

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