During a time of increased competitor activity, Intel has decided to disclose some of the high level details surrounding its next generation consumer processor, known as Rocket Lake or Intel’s 11th Gen Core. The new processor family is due in the market in the first quarter of 2021, and is expected to share a socket and motherboard compatibility with the current 10th Gen Comet Lake processors, providing an upgrade path even for those with a Core i9-10900K, Intel’s highest performing desktop processor to date. New 500-series motherboards are also expected to be available.

The new Rocket Lake-S silicon or SoC is going to be known as ‘Cypress Cove’. Intel confuses itself in the press release compared to the PDF presentation, as the press release dictates that this isn’t the core – it specifically states that the core microarchitecture is Ice Lake (Sunny Cove). However the presentation PDF says Cypress Cove is the core. In this instance, to be clear, Sunny Cove and Cypress Cove are set to be practically identical, however Sunny Cove is on 10nm and Cypress Cove is the back-ported variant on 14nm.

Paired with these cores will be the Tiger Lake graphics architecture, known as Xe-LP, which is also being backported from 10nm to 14nm for this product. The combined 14nm representation of Ice Lake cores and Xe-LP graphics is what is going to be known as Rocket Lake, (at least one of) the SoC(s) of the 11th Gen Core family.

With the new processors, Intel is targeting a raw instruction-per-clock uplift in the double digit range, which would be similar to the uplift we saw moving from Comet Lake to Intel’s Ice Lake mobile processors. Because of the node difference, the exact IPC change is likely to be lower than what we’ve seen before, but 10%+ is still highly respectable, especially if Intel is also able to maintain the high frequency it has achieved with the current generation of Comet Lake.

One of the benefits of moving to a back-ported Sunny Cove core will be the inclusion of the AVX-512 vector acceleration unit in Cypress Cove. This enables Intel to enable its library of Deep Learning Boost technologies for AI and ML acceleration, including support for Vector Neural Network Instructions (VNNI), finally bringing AVX-512 to the desktop platform.

However, to mix and match the right combination of core count, graphics, and AVX-512 for die size/yield/cost, it appears that Rocket Lake-S will only offer a maximum of eight cores in its largest configuration. Within the press release PDF, Intel stated that the current silicon as tested is rated for 125 W TDP, with a top turbo boost of 250 W, which matches what we see on the Core i9-10900K already. There’s no escaping the performance-per-watt characteristics of the process node, which indicates that Intel might find hitting those high frequencies a little easier with fewer cores to deal with. Intel is also promoting new overclocking tools with Rocket Lake, however did not go into details.

Another feature that Intel has disclosed with Rocket Lake is the move to PCIe Gen 4.0 on the processor, with up to 20 lanes available. These are likely to be split into one x16 for graphics and one x4 for storage on most motherboards, and this aligns with what we’ve seen on the latest generation of Intel Z490 motherboards, some of which have already promoted support for PCIe 4.0 ‘on future Intel processors’. This means Rocket Lake. Intel also mentions that the memory controller now supports up to DDR4-3200, however the projected performance numbers were done with DDR4-2933 memory.

On the graphics side, moving to the Xe-LP graphics architecture is going to be a big uplift in graphics performance, with Intel suggesting a 50% improvement over current Comet Lake integrated graphics. It is worth noting here in the slide that Intel mentions ‘UHD Graphics ft Xe Graphics Architecture’ – this would perhaps point to a scaled down version of Xe compared to Tiger Lake. I’m fully expecting to see only 32 EUs here, as a balance between die area, power, and performance. In the fine print it suggests that there will be some versions of Rocket Lake without the integrated graphics enabled, similar to the F processors we see on the market today.

That being said, for those units with integrated graphics, Intel is promoting new media encoders and display resolution support, with up to 4K60 12-bit for 4:4:4 HEVC and VP9, or up to 4K60 with 10-bit 4:2:0 AV1, showcasing AV1 support for mainstream processors. Display resolution support has also increased, with up to three 4K60 displays or two 5K60 displays, supporting DP 1.4a (with HBR3) and HDMI 2.0b.

This was an unexpected news announcement this morning - speaking to peers it all seems to be a bit of a surprise - perhaps even for the PR teams, given that the system configurations as 'projected' in the slide above is dated 6th August, almost 3 months ago. It will be interesting to hear if Intel will disclose more details ahead of launch.

Source: Intel

Related Reading




Comments Locked


View All Comments

  • Spunjji - Friday, October 30, 2020 - link

    The rumours - to which I currently credit near-zero veracity - reckon it'll hit 5.5Ghz on 14nm++++.

    Why a larger core design would clock faster on a process for which it hasn't been optimised, vs an architecture that has had 4 rounds of optimisation for the process since release, is beyond me.

    I reckon it'll push 5.2Ghz at that 250W outside-edge and thus barely, *BARELY* scrape back the single-thread crown, at the cost of hilarious power use and a bloated die. The profit margins will surely be depressing.
  • MDD1963 - Thursday, October 29, 2020 - link

    "providing an upgrade path even for those with a 10900K" Oh, yes, I'm sure 10900K users are quite relieved at this news, as I'm sure most are already feeling quite hindered with current performance levels... :)
  • Spunjji - Friday, October 30, 2020 - link

    I mean, it's not a bad proposition for said owner 1-3 years from now when Rocket Lake is in the bargain bin and they can get a substantial performance boost to go with a new GPU.
  • MetaCube - Saturday, October 31, 2020 - link

    The 11900K will never hit the bargain bin though.
  • Spunjji - Monday, November 2, 2020 - link

    Not brand-new, for sure. Intel don't do price cuts! But system pulls are a great way to pick up an upgrade.
  • Santoval - Thursday, October 29, 2020 - link

    The most noteworthy part is the AV1 encoder, though I doubt the very fat TDP due to the paleolithic in computing terms 7-year old (in 2021) process node is worth the trouble. It's also a first-gen hardware encoder, which almost certainly means it will generate crappy quality videos (it's always better to do encoding in software, while decoding can be done in either software or hardware, it doesn't really matter).

    Do the 5000 series Ryzen CPUs only support AV1 decoding or not even that?
  • Zizy - Friday, October 30, 2020 - link

    CPUs obviously support any encoder or decoder you want, it just isn't fast or efficient. 6xxx series GPUs support AV1 to some degree, I can't be bothered to look what exactly.
  • GeoffreyA - Friday, October 30, 2020 - link

    Not sure about Zen 3. RDNA2 appears to have some form of decoding at least.

    For an improvement in speed over libaom, give Intel's SVT-AV1 a spin. FFmpeg includes it. But I think they've traded quality for speed, compared to libaom. At any rate, I'm waiting for VVC, to see what it can do :)
  • Santoval - Friday, October 30, 2020 - link

    I (somehow) forgot that non-APU Zen 3 processors will continue to lack a GPU block. Media / video engines are tightly paired with GPUs, so since non-APU Zen 3 CPUs will lack a GPU they will also lack a media block and thus any decoding and encoding acceleration.
    AMD's Navi 2 cards support AV1 decode acceleration (but not encode), and I expect the same will apply to AMD's APUs - probably only the Van Gogh ones (Zen 2 + Navi 2). Intel's SVT-AV1 is fast but generates crappy quality videos.
  • Santoval - Friday, October 30, 2020 - link

    edit : Above I meant "I expect the same will apply to AMD's *next-gen* APUs". Since AMD's Zen 3 based Cezanne APUs will retain a Vega GPU block it is doubtful they will support AV1 decode acceleration or any new decode or encode acceleration at all. Unless of course AMD realize their folly and scrap their bizarre plans for distinct (and both unequal) Cezanne and Van Gogh APUs and simply pair Zen 3 with a Navi 2 GPU block. That's very doubtful.

Log in

Don't have an account? Sign up now